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TOPIC: OSC Setting 18F13K22

Re: OSC Setting 18F13K22 6 years 10 months ago #16360

  • W4GNS
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I'm starting to play with Proton again, plus a new chip on top of that, which of course is a headache. I trying to run the 13K22 at 64 Mhz but me fearless blinky led says I'm wrong, it's blinking every 2 seconds, not 1 second as expected.What am I failing to do?
Device = 18F13K22

Config_Start
  FOSC = ECH	;EC (high)
  PLLEN = On	;Oscillator multiplied by 4
  PCLKEN = On	;Primary clock enabled
  FCMEN = OFF	;Fail-Safe Clock Monitor disabled
  IESO = OFF	;Oscillator Switchover mode disabled
  PWRTEN = OFF	;PWRT disabled
  BOREN = SBORDIS	;Brown-out Reset enabled in hardware only (SBOREN is disabled)
  BORV = 19	;VBOR set to 1.9 V nominal
  WDTEN = OFF	;WDT is controlled by SWDTEN bit of the WDTCON register
  WDTPS = 32768	;1:32768
  HFOFST = On	;HFINTOSC starts clocking the CPU without waiting for the oscillator to stablize.
  MCLRE = On	;MCLR pin enabled, RA3 input pin disabled
  STVREN = On	;Stack full/underflow will cause Reset
  LVP = On	;Single-Supply ICSP enabled
  BBSIZ = OFF	;512W boot block size
  XINST = OFF	;Instruction set extension and Indexed Addressing mode disabled (Legacy mode)
  Debug = OFF	;Background debugger disabled, RA0 and RA1 configured as general purpose I/O pins
  CP0 = OFF	;Block 0 not code-protected
  CP1 = OFF	;Block 1 not code-protected
  CPB = OFF	;Boot block not code-protected
  CPD = OFF	;Data EEPROM not code-protected
  WRT0 = OFF	;Block 0 not write-protected
  WRT1 = OFF	;Block 1 not write-protected
  WRTC = OFF	;Configuration registers not write-protected
  WRTB = OFF	;Boot block not write-protected
  WRTD = OFF	;Data EEPROM not write-protected
  EBTR0 = OFF	;Block 0 not protected from table reads executed in other blocks
  EBTR1 = OFF	;Block 1 not protected from table reads executed in other blocks
  EBTRB = OFF	;Boot block not protected from table reads executed in other blocks
Config_End

;**** End of Fuse Configurator Settings ****
;-------------------------------------------------------------------------------

Declare Xtal 64
All_Digital = True

OSCCON = %01110111

Re: OSC Setting 18F13K22 6 years 10 months ago #12602

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What are you getting your clock signal from?

Re: OSC Setting 18F13K22 6 years 10 months ago #12603

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FOSC = ECH should set Internal OSC, me tinks?

Edit: Thats wrong according to the datascrible

Edit 2: Changed FOSC = ECH to FOSC = IRC (to use internal OSC same problem.

Re: OSC Setting 18F13K22 6 years 10 months ago #12604

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OK These settings have me going. I'm headed back to my C compiler, it's entirely too much
of a pain in the rear to switch between Basic and C.
OSCCON = %01110010 ' IRCF<6:4> and SCS<1:0> => 16MHz internal osc
 OSCCON2 = %00000000 ' PRI_SD<2> = Osc drive circuit OFF
 OSCTUNE = %10000000 ' INTRC = 1
 CM1CON0.7 = 0 ' comp1 off
 CM2CON0.7 = 0 ' comp2 off
 ANSEL = %00000000 ' all digital
 ANSELH = %00000000 ' all digital
 TRISC = %00000000 ' portC cleared for output

Re: OSC Setting 18F13K22 6 years 10 months ago #12605

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EC* = external clock (i.e., a square wave signal into OSCI pin)
LP,XT and HS are all for crystals (I'd usually use HS)
INTOSC = internal oscillator.

Re: OSC Setting 18F13K22 6 years 10 months ago #12610

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Got my head screwed on a little tighter tonight, and started working with CCS, to blink a LED (only) the lst file said it was 126 bytes ROM, 5 bytes of ram used, this did not feel right.
Fired up Proton and it claims 88 program bytes and 4 bytes of ram, that should not be ??

OK tried playing with optimization with CCS, lowest setting is 140 rom, and 5 ram.
highest level of optimization (11 on 18F) 126 bytes rom, 5 byts ram. WTF!?

EDIT: Got CCS down to 110 byts and 5 ram

Tried the same thing with SourceBoostC it kicks butt @ 58 bytes rom, and 2 bytes ram
http://www.sourceboost.com/

Edit2: A decent codeer could get BoostC down more.
Edit3: enough of LED's,now to printf something.
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