- Published: Saturday, 04 April 2009
- Written by Digital DIY
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More and more serial bus systems are preferred instead of a parallel bus, because of the simpler wiring. As the efficiency of serial buses increases, the speed advantage of the parallel data transmission gets less important. The clock frequencies of SPI devices can go up to some Megahertz and more. There are a lot of application where a serial transmission is perfectly sufficient.
The Serial Peripheral Interface is used primarily for a synchronous serial communication of host processor and peripherals..
In the standard configuration for a slave device (see illustration 1), two control and two data lines are used. The data output SDO serves on the one hand the reading back of data, offers however also the possibility to cascade several devices. The data output of the preceding device then forms the data input for the next IC.
Illustration 1: SPI slave
There is a MASTER and a SLAVE mode. The MASTER device provides the clock signal and determines the state of the chip select lines, i.e. it activates the SLAVE it wants to communicate with. CS and SCKL are therefore outputs.
The SLAVE device receives the clock and chip select from the MASTER, CS and SCKL are therefore inputs.
This means there is one master, while the number of slaves is only limited by the number of chip selects.
A SPI device can be a simple shift register up to an independent subsystem. The basic principle of a shift register is always present. Command codes as well as data values are serially transferred, pumped into a shift register and are then internally available for parallel processing. Here we already see an important point, that must be considered in the philosophy of SPI bus systems: The length of the shift registers is not fixed, but can differ from device to device. Normally the shift registers are 8Bit or integral multiples of it. Of course there also exist shift registers with an odd number of bits. For example two cascaded 9Bit EEPROMs can store 18Bit data.
If a SPI device is not selected, its data output goes into a high-impedance state (hi-Z), so that it does not interfere with the currently activated devices. When cascading several SPI devices, they are treated as one slave and therefore connected to the same chip select.
Thus there are two meaningful types of connection of master and slave devices. illustration 2 shows the type of connection for cascading several devices.
Illustration 2: Cascading several SPI devices
In illustration 2 the cascaded devices are evidently looked at as one larger device and receive therefore the same chip select. The data output of the preceding device is tied to the data input of the next, thus forming a wider shift register.
If independent slaves are to be connected to a master an other bus structure has to be chosen, as shown in illustration 3. Here, the clock and the SDI data lines are brought to each slave. Also the SDO data lines are tied together and led back to the master. Only the chip selects are separately brought to each SPI device.
Illustration 3: Master with independent slaves
Data and Control Lines of the SPI
The SPI requires two control lines (CS and SCLK) and two data lines (SDI and SDO). The chip select line is named SS (Slave-Select).
With CS (Chip-Select) the corresponding peripheral device is selected. This pin is mostly active-low. In the unselected state the SDO lines are hi-Z and therefore inactive. The master decides with which peripheral device it wants to communicate. The clock line SCLK is brought to the device whether it is selected or not. The clock serves as synchronization of the data communication.
The majority of SPI devices provide these four lines. Sometimes it happens that SDI and SDO are multiplexed, for example in the temperature sensor LM74 from National Semiconductor, or that one of these lines is missing. A peripheral device which must or can not be configured, requires no input line, only a data output. As soon as it gets selected it starts sending data. In some ADCs therefore the SDI line is missing (e.g. from Microchip).
There are also devices that have no data output. For example controllers (e.g. COP472-3 from National Semiconductor), which can be configured, but cannot send data or status messages.